Analysis of Mobility in Graded-Channel SOI Transistors Aiming at Circuit Simulation
This work presents an analysis of the behavior of the effective mobility of graded-channel FD SOI transistors using an Y-Function-based technique. Low field mobility, linear and quadratic attenuation factors were extracted from two-dimensional numerical simulations. The influence of the length of both channel regions over these parameters was analyzed. The parameters extracted from experimental data were used in a SPICE simulator, showing that it is possible to simulated GC SOI MOSFET using a regular SOI MOSFET model, by adjusting its parameters.
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