Ultra-low Power Integrated Analog Front-End for ISFET-based Sensors
In this paper, an integrated analog front-end (AFE) to condition ISFET-based sensors is presented. This is accomplished by a pH-controlled ring oscillator (pHCO) that produces a pulse frequency-modulated signal proportional to pH of a testing solution. The AFE was designed in a 180-nm standard CMOS process and a Verilog-based model was used to aid electrochemical simulations. Sensorless measurements of the chip were carried out on the oscilloscope and results revealed a digitally-represented signal with 70 MHz/V of responsivity, under a sweeping voltage from 1.0 V to 1.2 V, and a worst-case scenario of 69.4 µW for the overall power consumption. Moreover, the circuit topology circumvents the body effect problems, suppress the use of OP-AMPs or ADCs, and allows monolithic integration.
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