• Table of Contents and Foreword

  Marcelo Lubaszewski, Marcelo Antonio Pavanello

  1 - 6

Special Section on Best SBCCI2010 Papers

• A Design Methodology Using the Inversion Coefficient for Low-Voltage Low-Power CMOS Voltage References

  Dalton Colombo, Christian Fayomi, Frederic Nabki, Luiz F. Ferreira, Gilson Wirth, Sergio Bampi

  7 - 17
• A 5.4 GHz Fully-Integrated Low-Noise Mixer

  Stanley S. K. Ho, Carlos E. Saavedra

  18 - 24
• A GALS Pipeline DES Architecture to Increase Robustness against CPA and CEMA Attacks

  Rafael I. Soares, Ney L. V. Calazans, Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres

  25 - 34
• Efficient Interfacing of Partially Reconfigurable Instruction Set Extensions for Softcore CPUs on FPGAs

  Dirk Koch, Christian Beckhoff, Jim Torresen

  35 - 42
• A Novel Macroblock-Level Filtering Upsampling Architecture for H.264/AVC Scalable Extension

  Thaísa L. da Silva, Luis A. S. Cruz, Luciano V. Agostini

  43 - 49
• Framework for Generating Configurable SAT Solvers

  Bernardo C. Vieira, Fabrício V. Andrade, Antônio O. Fernandes

  50 - 59

Regular Papers

• Oscillation Amplitude Analysis of MOS Hartley Oscillator Using a General Model

  Sadegh Raiessi Ardali, Sajad Ghatreh Samani, Babak Arzanifar

  60 - 67
• Energy Harvesting Circuit Using Variable Capacitor with Higher Performance

  Helder R. Florentino, Dimitri Galayko, Raimundo C. S. Freire, Benedito A. Luciano, Caio Florentino

  68 - 74
• Low power CMOS full adder design with body biasing approach

  Manoj Kumar, Sandeep K. Arya, Sujata Pandey

  75 - 80