Vol 12 No 2 (2017): Journal of Integrated Circuits and Systems | Journal of Integrated Circuits and Systems

Marcelo Antonio Pavanello

JICS Editor-in-chief

Printed ISSN: 1807-1953

Published: 2017-08-21

Table of Contents and Foreword

Marcelo Antonio Pavanello

56 - 61
Origin of the Low-Frequency Noise in the Asymmetric Self-Cascode Structure Composed by Fully Depleted SOI nMOSFETs

Rafael Assalti, Rodrigo T. Doria, Denis Flandre, Michelly de Souza

62 - 70
Focal-Plane Compression Imager with Increased Quantization Bit Rate and DPCM Error Modeling

Fernanda Duarte Vilela Reis de Oliveira, Tiago Monnerat de Faria Lopes, José Gabriel Rodríguez Carneiro Gomes, Fernado Antônio Pinto Barúqui, Antonio Petraglia

71 - 81
Ground Plane Influence on Analog Parameters of Different UTBB nMOSFET Technologies

V. T. Itocazu, V. Sonnenberg, J. A. Martino, E. Simoen, Cor Clayes

82 - 88
Electrospun Polymeric Fibers Coated With Pd As A Sensitive Layer For Hydrogen Detection

Ana Neilde R. da Silva, Sebastião Gomes dos Santos Filho, Marcelo Bariatoo A. Fontes

89 - 94
An UHF RFID tag characterization methodology including a low-Bcaosqsute rao,n Cdab rleoraw, S-ousa complexity SDR platform for information extraction

Juán Sebastián Moya Baquero, Fabian L. Cabrera, Fernando Rangel de Sousa

95 - 100
Analytical Model for Threshold Voltage in UTBB SOI MOSFET in Dynamic Threshold Voltage Operation

V. T. Itocazu, K. R. A. Sasaki, V. Sonnenberg, J. A. Martino, E. Simoen, C. Claeys

101 - 106